1. Field of the Invention
The present invention relates to a nonvolatile semiconductor memory device. More specifically, the invention relates to a ferroelectric random access memory (hereinafter referred to as FeRAM) that uses a ferroelectric capacitor.
2. Description of the Related Art
A FeRAM has recently been noted as one of semiconductor memory devices. The FeRAM is nonvolatile and has the advantages that the number of times of rewrite is 1012, the read and write time is almost equal to that of a dynamic RAM (DRAM), and the memory can operate at low voltage of 2.5 V to 5 V. With these advantages, the FeRAM may take the lion's share of the memory market. (See, for example, T. Sumi et al., “A 256 Kb Nonvolatile Ferroelectric Memory at 3 V and 100 ns,” ISSCC Digest of Technical Papers, February, 1994, pp. 268 and 269 and H. Koike et al., “A 60-ns 1-Mb Nonvolatile Ferroelectric Memory with a Nondriven Cell Plate Line Write/Read Scheme,” IEEE Journal of Solid State Circuit, Vol. 30, No. 11, November, 1996, pp. 1625 to 1634).
In the prior art FeRAM, burst mode, page mode and static column mode are essential for achievement of high-speed access. A time period for keeping the potential of a plate line high in these modes becomes longer than that in random access mode. The prior art FeRAM has the problem that a great load is applied to the ferroelectric capacitor in high-speed access mode.